Digital control systems

In short

A digital control system closes a feedback loop through a computer: the plant's analogue output is sampled and converted by an ADC, a difference equation is solved in a microcontroller, DSP or PLC, and the result is sent out through a DAC and a hold circuit. Because the controller sees the plant only at sampling instants kT, the maths moves from the Laplace s-domain to the z-domain, and stability moves from "left half-plane" to "inside the unit circle". This is the form almost every real controller takes today - motor drives, solar and EV inverters, numerical protection relays, process DCS loops, autopilots - so it is standard in final-year EEE electives, is examined as discrete-time systems, z-transform, sampling and stability in GATE (explicitly in Instrumentation, and through signals/control in EE and EC - syllabi vary, check your university's), and is asked directly in embedded-control and drives interviews at BHEL, ABB, Siemens, Honeywell, L&T, Bosch, TI and ISRO/DRDO labs.

Explained

Why digital, and the structure of the loop

• Signal path: plant → sensor/transmitter → anti-aliasing filter → sample-and-hold + ADC → algorithm (difference equation) → DAC + hold → power amplifier/actuator → plant.
• The sampler converts a continuous signal into a number sequence e(kT); the hold converts numbers back into a staircase signal. Almost always a zero-order hold (ZOH): output is held constant over one period T.
• Advantages: complex algorithms (adaptive, multivariable, gain scheduling, logic + control together) at no extra hardware cost; no drift, ageing or temperature dependence of gains; easy retuning, logging, diagnostics, communication; one processor time-shares many loops.
• Limitations: aliasing if filtering is wrong; quantization in ADC, coefficients and arithmetic; an inherent transport lag of about T/2 from the hold plus the computation delay, which costs phase margin; sensitivity to sampling jitter and to overruns in the real-time task.
• Classification: continuous vs discrete; sampled-data (mixed continuous plant + discrete controller - the usual case) vs fully discrete; single-rate vs multirate (fast current loop, slow speed/position loop); synchronous (fixed T, timer-interrupt driven) vs event-triggered.

Sampling, reconstruction and aliasing

• Shannon/Nyquist sampling theorem: a signal band-limited to f_max can be reconstructed exactly only if f_s > 2 f_max; f_s/2 is the Nyquist (folding) frequency.
• Sampling repeats the spectrum at multiples of ω_s = 2π/T. Components above f_s/2 fold back as false low-frequency signals - aliasing - and no digital filter can remove them afterwards.
• Remedy: an analogue anti-aliasing low-pass filter before the ADC (typically 2nd-4th order, cut-off near the signal bandwidth), plus oversampling to ease the filter.
• Practical choice of T (not from Nyquist, which is only a lower bound): ω_s ≈ 20-40 × closed-loop bandwidth ω_b, or 6-10 samples within the rise time. Typical values: motor current loop 50-200 µs (tied to PWM, 5-20 kHz); speed loop 1 ms; temperature/level loop 100 ms-1 s; numerical relay 64-256 samples per 50 Hz cycle.
• Too large T → poor disturbance rejection, large intersample ripple, loss of phase margin, apparent plant "dead time"; too small T → processor load, and coefficient round-off as poles crowd towards z = 1.
• Ideal reconstruction needs a sinc interpolator (non-causal); the real ZOH gives a staircase with gain |sin(ωT/2)/(ωT/2)| and a phase lag ≈ ωT/2, i.e. a delay of half a sample.

The z-transform and the pulse transfer function

• Definition: F(z) = Σ_{k=0}^{∞} f(kT) z^{-k}; z corresponds to one-sample advance, z^{-1} to one-sample delay. The link to the s-plane is z = e^{sT}.
• Properties used in exams: linearity; delay f(k-n) ↔ z^{-n}F(z); advance; initial value f(0) = lim_{z→∞}F(z); final value lim_{k→∞}f(k) = lim_{z→1}(1-z^{-1})F(z) (valid only if the system is stable); convolution ↔ product; real convolution for difference equations.
• Inverse z-transform methods: long division (gives the sequence term by term), partial fractions of F(z)/z then table look-up, residues/inversion integral.
• Pulse (discrete) transfer function: G(z) = Y(z)/U(z) for the sampler-plant-hold combination. With a ZOH: G(z) = (1 − z^{-1}) · Z{ L^{-1}[G(s)/s] } - exact at the sampling instants.
• Sampler placement matters: two blocks separated by a sampler give G₁(z)G₂(z); cascaded with no sampler between them they give the single transform "G₁G₂(z)", which is generally different. Writing G₁(z)G₂(z) when there is no intermediate sampler is a classic exam error.
• Closed loop with error sampled, ZOH-plant G(z), digital controller D(z) and continuous feedback H(s): C(z)/R(z) = D(z)G(z) / [1 + D(z)·GH(z)], where GH(z) is the single transform of the plant-and-sensor cascade (it becomes G(z)H(z) only if a sampler separates them). Note that a sampled-data loop may have no closed-form "C(z)/R(z)" if the reference enters between samplers - then only C(z) is obtainable.
• The modified z-transform recovers intersample values (useful when dead time is not an integer multiple of T); dead time of n whole samples simply appears as z^{-n}.

Stability and transient behaviour in the z-plane

• A discrete LTI system is stable iff all poles of the closed-loop pulse transfer function lie strictly inside the unit circle, |z| < 1. On the circle → marginally stable; outside → unstable.
• Mapping s → z: LHP → inside the unit circle; the jω axis → the unit circle; s = 0 → z = 1; σ = constant → circle of radius e^{σT}; ω = constant → radial line at angle ωT; constant-ζ lines → logarithmic spirals. Because e^{sT} is periodic, only the primary strip −π/T < ω ≤ π/T maps one-to-one.
• From a pole pair z = r∠θ: σ = ln r / T, ω_d = θ/T, ω_n = √(σ² + ω_d²), ζ = −σ/ω_n. A pole near z = 1 is slow; near z = 0 is fast and well damped; on the negative real axis it alternates in sign (ringing at the Nyquist rate).
• Stability tests: (i) compute the roots; (ii) Jury's test (direct, on the characteristic polynomial in z); (iii) the bilinear (w-plane) transformation z = (1+w)/(1−w), which maps the interior of the unit circle to the left half-plane so the ordinary Routh-Hurwitz criterion can be applied; (iv) the root locus drawn in the z-plane (same construction rules, but the stability boundary is now the unit circle); (v) Nyquist/Bode on the discrete loop gain evaluated at z = e^{jωT}.
• Jury conditions for a second-order polynomial z² + a₁z + a₀: |a₀| < 1, 1 + a₁ + a₀ > 0, 1 − a₁ + a₀ > 0 (the stability triangle). For F(z) of order n, the necessary checks are F(1) > 0 and (−1)ⁿ F(−1) > 0, |a₀| < |a_n|.
• A continuous system that is stable for all gains can become unstable in discrete form at high gain or large T - sampling always costs margin. Conversely, increasing T shrinks the stable gain range.

Steady-state accuracy and discrete response

• Error: E(z) = R(z)/[1 + D(z)G(z)]; steady-state error e_ss = lim_{z→1}(1 − z^{-1})E(z).
• Static error constants (ZOH-equivalent loop gain G_L(z)): K_p = lim_{z→1}G_L(z); K_v = (1/T)·lim_{z→1}(z−1)G_L(z); K_a = (1/T²)·lim_{z→1}(z−1)²G_L(z). Note the 1/T and 1/T² factors - omitting them is a standard mistake.
• Error table: type 0 → finite error 1/(1+K_p) to a step, ∞ to a ramp; type 1 (one pole at z = 1) → zero step error, 1/K_v ramp error; type 2 → zero ramp error, 1/K_a to a parabola. A pole at z = 1 is the discrete integrator (digital equivalent of 1/s).
• Transient specifications (rise time, peak overshoot, settling time) are read from the equivalent ζ and ω_n obtained from the dominant z-plane poles; number of samples per cycle of ringing = 2π/θ.
• Intersample behaviour is invisible to z-domain analysis: a design can look perfect at kT and still ripple badly in between (hidden oscillation), especially with a deadbeat controller, or when the plant carries an oscillatory mode at an integer multiple of ω_s, which the samples cannot see at all.

Designing the digital controller

• Emulation (discrete redesign of an analogue design) - design D(s) by continuous methods, then discretize. Fast and common; valid when T is small (ω_s ≥ 20-40 ω_b).
  • Forward (explicit) Euler s ≈ (z−1)/T: simplest, can destabilise.
  • Backward Euler s ≈ (z−1)/(Tz): always maps stable → stable, but distorts.
  • Tustin / bilinear s ≈ (2/T)(z−1)/(z+1): maps LHP exactly onto the unit disc, no aliasing; best general choice; prewarping matches a chosen critical frequency.
  • ZOH / step-invariant (c2d 'zoh'): exact step response at the samples - the right choice for the plant model.
  • Matched pole-zero: z_i = e^{s_i T}, gain matched at DC.
• Direct digital design - work entirely in z: root locus or pole placement in the z-plane, frequency response at z = e^{jωT}, or analytical design. Mandatory when T is large relative to the dynamics.
• Deadbeat design: choose D(z) so that the closed-loop transfer function becomes z^{-n}, i.e. the output reaches and stays at the reference in n samples. D(z) = (1/G(z))·[z^{-n}/(1 − z^{-n})]. Limitations: it inverts the plant, so unstable or non-minimum-phase plants and plant delays must be kept in the design; it demands very large control effort, is extremely model-sensitive, and leaves intersample ripple unless extra ripple-free conditions are imposed.
• Digital PID / discrete controller implementation - the controller is finally a difference equation such as u(k) = Σ a_i u(k−i) + Σ b_i e(k−i), coded in a timer ISR. Standard precautions: trapezoidal (not rectangular) integration, derivative on the measurement with a filter, anti-windup clamping of the integral term when the actuator saturates, and bumpless transfer between manual and auto. (Tuning rules themselves belong to the PID topic.)
• Discrete state space form (for completeness): x(k+1) = A_d x(k) + B_d u(k), with A_d = e^{AT} and B_d = (∫₀^T e^{Aτ}dτ)B; pole placement then puts the eigenvalues of (A_d − B_d K) inside the unit circle, and an observer/state estimator reconstructs unmeasured states.

Implementation, hardware and Indian practice

• Hardware: microcontrollers and DSCs (STM32, TI C2000, dsPIC), FPGA for very fast loops, PLC/DCS for process loops, 12-16 bit SAR or delta-sigma ADCs, PWM instead of a DAC for power stages.
• Quantization: ADC resolution LSB = FSR/2^N; amplitude quantization behaves like added noise (SNR ≈ 6.02N + 1.76 dB for a full-scale sine). Coefficient quantization shifts poles; arithmetic round-off in fixed point (Q-format) causes limit cycles and dead-band. Use second-order sections (direct form II, cascade) rather than one high-order direct-form filter, and prefer floating point (IEEE 754) or 32-bit fixed point for near-z=1 poles.
• Timing discipline: sample at a hard, jitter-free rate (timer/PWM-synchronised ADC trigger); compute within the period; model the one-sample computational delay as z^{-1} rather than ignoring it; synchronise current sampling to the PWM centre to reject switching ripple.
• Standards and codes (India): BIS adopts most IEC control/instrumentation standards as IS/IEC. Functional safety of programmable electronic control uses IEC 61508 with sector parts - IEC 61511 for process industry, IEC 61800-5-2 for drive safety functions; IEC 61800-3 covers drive EMC and the IEC 61000 series covers EMC immunity/emission, both relevant because sampled loops are vulnerable to conducted noise. Numerical protection relays follow IEC 60255; substation digital communication follows IEC 61850; automotive embedded control follows ISO 26262 (ASIL), AUTOSAR and MISRA C coding rules. CEA technical standards and grid codes set the performance expected of grid-tied inverter control in India. Exact clause numbers and the latest editions should be confirmed against the current BIS/IEC listing.

Key points

• Digital control loop - sampler + ADC, difference equation, DAC + ZOH; the controller sees the plant only at t = kT.
• z = e^{sT} - the bridge from s-plane to z-plane; LHP maps inside the unit circle.
• Stability - all closed-loop poles strictly inside |z| = 1; test by roots, Jury, or bilinear + Routh.
• Sampling theorem - f_s > 2f_max to avoid aliasing; only an analogue anti-aliasing filter can prevent it.
• Practical sampling rate - ω_s ≈ 20-40 ω_b, or 6-10 samples per rise time; Nyquist alone is far too slow for control.
• ZOH - holds the output constant for T; adds gain roll-off and a phase lag of about ωT/2 (half-sample delay).
• ZOH equivalent - G(z) = (1 − z^{-1})Z{L^{-1}[G(s)/s]}; exact at sampling instants only.
• Sampler position - G₁(z)G₂(z) ≠ G₁G₂(z); blocks must be separated by a sampler to multiply transforms.
• Digital integrator - a pole at z = 1; system "type" is counted by poles at z = 1, not at z = 0.
• Error constants - K_v and K_a carry 1/T and 1/T² factors in discrete form.
• Final value theorem - lim (1 − z^{-1})F(z) as z → 1, valid only for a stable system.
• Pole interpretation - r = e^{σT}, θ = ω_d T; ζ = −ln r/√(ln²r + θ²).
• Discretization methods - Tustin for controllers, ZOH for plants, backward Euler as a safe quick option, forward Euler riskiest.
• Deadbeat controller - settles in n samples by inverting the plant; model-sensitive, high effort, intersample ripple unless designed out.
• Dead time - n whole sampling periods become z^{-n}; fractional delay needs the modified z-transform.
• Quantization - LSB = FSR/2^N; SNR ≈ 6.02N + 1.76 dB; coefficient round-off moves poles and can cause limit cycles.
• Computational delay - model it as z^{-1}; jitter and overruns degrade an otherwise correct design.
• Multirate design - nest a fast inner (current) loop inside a slower outer (speed/position) loop.

Formulas and examples

Example 1 - ZOH discretization and step response. Plant G(s) = 1/(s+2), T = 0.1 s.

• G(s)/s = 1/[s(s+2)] = (1/2)[1/s − 1/(s+2)] → L^{-1} = (1/2)(1 − e^{−2t}).
• Z-transform: (1/2)[z/(z−1) − z/(z − e^{−0.2})], and e^{−0.2} = 0.81873.
• G(z) = (1 − z^{−1}) × above = (1/2)(1 − 0.81873)/(z − 0.81873) = 0.09063/(z − 0.81873).
• Difference equation: y(k+1) = 0.81873 y(k) + 0.09063 u(k).
• Unit-step response: y(1) = 0.0906, y(2) = 0.81873(0.0906) + 0.0906 = 0.1648, y(3) = 0.2256.
• Check against the exact continuous response at t = 0.3 s: 0.5(1 − e^{−0.6}) = 0.5(1 − 0.5488) = 0.2256 - identical, confirming ZOH is exact at sampling instants. Final value = 0.09063/0.18127 = 0.500 = DC gain of 1/(s+2). ✔

Example 2 - gain range for stability. G(s) = K/[s(s+1)] with ZOH, T = 1 s.

• G(z) = K[(e^{−T}+T−1)z + (1 − e^{−T} − Te^{−T})] / [(z−1)(z−e^{−T})] = K(0.36788z + 0.26424)/[(z−1)(z−0.36788)].
• Characteristic equation: (z−1)(z−0.36788) + K(0.36788z + 0.26424) = z² + (0.36788K − 1.36788)z + (0.36788 + 0.26424K) = 0.
• Jury: |a₀|<1 → 0.36788 + 0.26424K < 1 → K < 0.63212/0.26424 = 2.39.
• 1 + a₁ + a₀ > 0 → 0.63212K > 0 → K > 0. 1 − a₁ + a₀ > 0 → 2.73576 − 0.10364K > 0 → K < 26.4.
• Stable for 0 < K < 2.39. (The same plant in continuous form is stable for every K > 0 - sampling has created an upper limit.)

Example 3 - steady-state error. For Example 2 with K = 1: K_v = (1/1)·lim_{z→1}(z−1)G(z) = (0.36788 + 0.26424)/(1 − 0.36788) = 0.63212/0.63212 = 1.0 s⁻¹. Step error = 0 (one pole at z = 1); unit-ramp error = 1/K_v = 1.0 unit; parabolic input → error ∞.

Example 4 - Tustin vs exact discretization. Analogue filter H(s) = 1/(1 + 0.05s), T = 0.01 s.

• s → (2/0.01)(z−1)/(z+1) = 200(z−1)/(z+1): H(z) = (z+1)/[(z+1) + 10(z−1)] = (z+1)/(11z − 9) = (0.0909 + 0.0909z^{−1})/(1 − 0.8182z^{−1}).
• Code: y(k) = 0.8182 y(k−1) + 0.0909[u(k) + u(k−1)]. DC gain = 0.1818/0.1818 = 1 ✔
• Exact (matched-pole) pole = e^{−0.01/0.05} = e^{−0.2} = 0.8187 against Tustin's 0.8182 - a 0.06% difference because T is only one-fifth of the time constant.

Example 5 - resolution and aliasing in a drive/relay. 12-bit ADC, 0-3.3 V, phase-current sensor 40 mV/A, control loop at 10 kHz.

• LSB = 3.3/4096 = 0.8057 mV → current resolution = 0.8057/40 = 0.0201 A; SNR ≈ 6.02×12 + 1.76 = 74 dB.
• Sampling at 10 kHz gives Nyquist 5 kHz; a 6.4 kHz switching harmonic aliases to |6400 − 10000| = 3.6 kHz inside the band - so an anti-aliasing filter below 5 kHz is mandatory.
• Loop lag from hold + computation ≈ 1.5T = 150 µs; at a 1 kHz bandwidth this is 360×1000×150e-6 = 54° of phase lag, which must be budgeted in the design.

Where it is used

• Motor drives and traction: field-oriented control of induction and PMSM machines in EV powertrains (Tata Motors, Ather, Ola, Mahindra), lifts and machine tools - current loops at 50-200 µs on TI C2000 or STM32 devices; vendors ABB, Siemens, Danfoss, Yaskawa, Amtech, Delta.
• Power electronics and renewables: digital control of solar PV inverters, MPPT, STATCOM and UPS; grid-tied inverter control must meet CEA/grid-code performance; firms include Delta, Sungrow India, Statcon, Hitachi Energy.
• Power system protection and metering: numerical relays sampling at 64-256 samples per 50 Hz cycle with discrete Fourier estimation (IEC 60255, IEC 61850) at BHEL, BEL, Hitachi Energy, Schneider; smart meters and feeder automation.
• Process industry: DCS and PLC loops in refineries, fertiliser, cement, steel and pharma (Honeywell, Yokogawa, Emerson, Rockwell, L&T) - sampled PID loops of 100 ms-1 s with safety instrumented functions to IEC 61511/61508.
• Aerospace, defence and nuclear: digital autopilots, gimbal and launch-vehicle control at ISRO and DRDO; reactor control and instrumentation at NPCIL/BARC with redundant sampled channels.
• Job roles: embedded control/firmware engineer, drives and power-electronics control engineer, controls validation and HIL test engineer, instrumentation & control engineer, model-based design (MATLAB/Simulink, auto-coded C) engineer.

Interview questions

• Q: Why is stability judged against the unit circle in digital control? A: Because z = e^{sT}, so the left half of the s-plane maps to |z| < 1; a pole with |z| ≥ 1 gives a sample sequence that does not decay.
• Q: Is satisfying the Nyquist rate enough to choose a sampling period for a control loop? A: No - Nyquist only prevents aliasing of a measurement. Control needs roughly 20-40 samples per closed-loop bandwidth period, i.e. 6-10 samples within the rise time.
• Q: Why is an analogue anti-aliasing filter necessary even with a very good digital filter? A: Once a high-frequency component is folded below f_s/2 by sampling it is indistinguishable from a genuine low-frequency signal, so no digital processing can separate it.
• Q: What does a zero-order hold do to stability margins? A: It contributes a sinc gain roll-off and a phase lag of about ωT/2 - effectively a half-sample dead time - which reduces phase margin and lowers the allowable gain.
• Q: How do you discretize a controller, and which method would you pick? A: Tustin (bilinear), optionally prewarped, because it maps the whole left half-plane into the unit disc without aliasing and preserves stability; ZOH is used for plant models since it is exact at the sampling instants.
• Q: G₁(z)G₂(z) or G₁G₂(z) - when is each correct? A: The product of individual transforms is valid only if a sampler separates the two blocks; with no sampler between them the cascade must be transformed as a single block.
• Q: What is a deadbeat controller and why is it rarely used as-is? A: It drives the output to the reference in a finite number of samples by inverting the plant; it demands huge control effort, is very sensitive to model error, fails for non-minimum-phase or unstable plants, and can leave intersample ripple.
• Q: A loop works in simulation but oscillates on hardware. What digital causes would you check? A: Sampling jitter or missed deadlines, unmodelled one-sample computational delay, aliased noise from a missing anti-aliasing filter, actuator saturation without anti-windup, and fixed-point coefficient round-off.
• Q: What is the discrete equivalent of an integrator and how do you implement it safely? A: A pole at z = 1, i.e. u(k) = u(k−1) + K·T·e(k) (better, trapezoidal); it is clamped or back-calculated when the output saturates to prevent integral windup.
• Q: How do you get damping ratio and natural frequency from a discrete pole pair? A: With z = r∠θ, σ = (ln r)/T and ω_d = θ/T, so ω_n = √(σ²+ω_d²) and ζ = −σ/ω_n.
• Q: Can the same system be stable continuously but unstable after sampling? A: Yes - sampling adds phase lag, so a gain that is safe in continuous time can push the discrete poles outside the unit circle, as with K/[s(s+1)] where T = 1 s limits K to about 2.39.
• Q: Why is the modified z-transform needed? A: The ordinary z-transform shows only the values at kT; the modified transform recovers intersample behaviour and handles dead times that are not integer multiples of T.

Common mistakes

• Treating f_s = 2f_max as an adequate control sampling rate instead of as a theoretical minimum.
• Multiplying individual z-transforms for cascaded blocks that have no sampler between them.
• Dropping the 1/T and 1/T² factors in K_v and K_a, or counting system type from poles at z = 0 instead of z = 1.
• Applying the Routh criterion directly to the characteristic polynomial in z without the bilinear transformation.
• Using the final value theorem on an unstable or marginally stable system and reporting a finite "steady state".
• Judging a design only at the sampling instants and missing intersample ripple or hidden oscillation.
• Ignoring the computational and ZOH delay in the model, or running the control algorithm in a non-deterministic loop instead of a fixed-rate timer interrupt.

Related topics

Control systems basics · Stability: Routh, root locus and Bode · State space analysis · PID controllers and tuning · PLC and SCADA basics · Signals and systems: sampling and z-transform