UPS and SMPS design

In short

A switched-mode power supply (SMPS) converts mains or DC input into regulated DC by chopping it at tens or hundreds of kilohertz through a transistor, a small ferrite transformer or inductor and a rectifier-filter, with a feedback loop holding the output steady. An uninterruptible power supply (UPS) adds energy storage — usually a battery bank — plus a rectifier/charger, an inverter and a bypass path, so the load never sees an interruption. Between them they power every phone charger, laptop adapter, LED driver, server, ATM, telecom BTS, hospital equipment and control panel in the country. The topic is examined in Power Electronics, Industrial Electronics and Power Quality papers, appears in GATE EE/EC (converter duty-cycle and ripple problems) and is a staple of interviews at Delta, Schneider/APC, Eaton, Vertiv, Luminous, Microtek, Su-Kam, Exide, Amara Raja, Bharat Electronics, Tata Power, Honeywell and telecom/EMS firms.

Explained

Why switch-mode: linear versus switching supplies

• A linear regulator drops the surplus voltage across a series pass transistor, dissipating (Vin − Vo)·Io as heat; efficiency ≈ Vo/Vin, so a 5 V/3 A output from 12 V wastes 21 W.
• An SMPS switches the device fully ON (low Rds(on), low loss) or fully OFF (no current), and the average is set by the duty cycle D = ton/T. Losses are only conduction + switching + magnetic losses, so 85-95% efficiency is normal.
• High switching frequency (50 kHz-2 MHz) shrinks the transformer and filter, because transformer voltage per turn ∝ f·Ac·Bm — a 50 Hz iron transformer for 100 W weighs kilograms, a 100 kHz ferrite one weighs tens of grams.
• Penalties of switching: conducted and radiated EMI, output switching ripple, higher design complexity, poorer transient response than a good linear regulator, and no inherent line isolation unless a transformer is used.
• Typical architecture of an offline (mains-fed) SMPS: EMI filter → bridge rectifier → bulk capacitor → (PFC stage) → isolated DC-DC converter → output rectifier + LC filter → feedback via optocoupler/TL431 → PWM controller.

Non-isolated converter topologies

• Buck (step-down): Vo = D·Vin. Output inductor carries the load current continuously in CCM; pulsating input current.
• Boost (step-up): Vo = Vin/(1 − D). Continuous input current — the reason it is used for PFC. Cannot current-limit a shorted output (input diode path).
• Buck-boost: |Vo| = Vin·D/(1 − D), output polarity inverted; SEPIC gives non-inverting step up/down with better input ripple (used in LED drivers and battery chargers), while Ćuk does the same job but with inverted output polarity.
• CCM vs DCM: in continuous conduction mode the inductor current never reaches zero; in discontinuous mode it does, making Vo load-dependent and the loop faster but raising peak currents. Boundary inductance for a buck: Lcrit = (1 − D)·R/(2f).
• Synchronous rectification replaces the freewheeling diode with a MOSFET — essential at low output voltages where a 0.4 V diode drop is 8% of a 5 V output.

Isolated topologies and their selection

• Flyback: transformer is really a coupled, gapped inductor — energy is stored when the switch is on and delivered to the secondary when it turns off. Simplest and cheapest, needs an RCD or active-clamp snubber for leakage-inductance spikes. Used up to about 150 W (adapters, standby rails, LED drivers).
• Forward: energy transfers while the switch is on; needs a core-reset mechanism (tertiary reset winding, RCD clamp or active clamp) and an output choke. Duty cycle limited to about 0.5 with a 1:1 reset winding. Good to roughly 300 W; two-switch forward halves device voltage stress.
• Push-pull: two switches drive a centre-tapped primary; each sees 2·Vin, and flux-walking with consequent transformer saturation must be controlled by current-mode control. Common in low-voltage DC inputs (12/24/48 V inverters).
• Half-bridge: two switches + two capacitors; device stress = Vin. Full-bridge: four switches, best transformer utilisation, used above ~500 W (server supplies, welding sets, UPS chargers).
• Resonant LLC / phase-shifted full bridge: achieve ZVS/ZCS soft switching, cutting switching loss and EMI; the workhorse of modern high-efficiency server and telecom rectifiers. Frequency (not duty) controls the output in LLC.
• Isolation is a safety requirement, not just a convenience: reinforced insulation, creepage/clearance, and a safety-rated optocoupler or digital isolator in the feedback path.

Control, feedback, protection and EMI

• Voltage-mode control: output error drives a comparator against a fixed sawtooth. Simple, but the LC double pole needs Type III compensation. Classic voltage-mode ICs: TL494, SG3525.
• Current-mode control (peak or average): the inner loop regulates inductor/switch current, giving inherent cycle-by-cycle current limit, easy paralleling and a single-pole plant; needs slope compensation for D > 0.5. Classic ICs: UC3842/3844, UC3854 (average-current-mode PFC).
• Loop design: crossover frequency typically fs/10 to fs/20; CCM boost and flyback have a right-half-plane zero that forces a low bandwidth; add an output-capacitor ESR zero and compensate with Type II (current mode) or Type III (voltage mode).
• Protections: soft start, over-current with hiccup or foldback, OVP (a latched crowbar or secondary sense), over-temperature, input under-voltage lockout, inrush limiting by NTC thermistor or resistor + bypass relay, MOV + fuse for surges.
• Power factor correction: a plain rectifier-capacitor front end draws narrow current pulses with PF ≈ 0.5-0.6 and high harmonics. Active boost PFC (CCM for >300 W, critical-conduction mode for smaller units) shapes the input current sinusoidally, giving PF > 0.95 and a 390-400 V DC bus. Required for compliance with harmonic limits.
• EMI: differential-mode noise (X-capacitors, differential chokes) and common-mode noise (CM choke, Y-capacitors to earth — their value is limited by touch-current/leakage limits). Conducted emission is measured 150 kHz-30 MHz; techniques include slower gate drive, snubbers, shielding layers in the transformer and spread-spectrum clocking.
• Magnetics: ferrite cores with Bmax kept to 0.2-0.3 T (below the ~0.39 T saturation of MnZn ferrite at 100 °C); losses rise as roughly B^2.5·f^1.3; conductor thickness is set by skin depth (δ ≈ 0.21 mm in copper at 100 kHz) — hence litz wire or foil; interleaving reduces leakage inductance and proximity loss.

UPS: classification and operation

• Power-quality problems a UPS addresses: outage, voltage sag/swell, under/over-voltage, frequency drift, transients and surges, harmonic distortion, noise.
• IEC/IS classification by output dependency (IEC 62040-3): VFD (voltage and frequency dependent = offline/standby), VI (voltage independent = line-interactive), VFI (voltage and frequency independent = online double conversion). Performance is coded like VFI-SS-111 (sine output, best waveform and transient classes).
• Offline/standby UPS: load runs on raw mains through a relay; on failure the inverter takes over in roughly 2-10 ms. Cheapest; used for desktop PCs. The Indian "home inverter" is the same idea with a longer transfer time and often a modified-sine output — fine for fans and lights, not for sensitive electronics.
• Line-interactive UPS: adds a tapped autotransformer (buck/boost AVR) that corrects voltage without touching the battery, plus a bidirectional converter that both charges and inverts. Transfer time 2-4 ms; the common choice for small servers and networking gear.
• Online double-conversion UPS: mains → rectifier/PFC → DC bus (battery floats here) → inverter → load, continuously. Zero transfer time, full voltage and frequency regulation, complete isolation of the load from input disturbances. Includes a static bypass (SCR switch) for overloads and inverter faults and a manual maintenance bypass for servicing. Efficiency 92-96%; "eco mode" runs the load on bypass to save energy at the cost of a short break on failure.
• Delta-conversion UPS processes only the difference between input and output, raising efficiency. Rotary and diesel-rotary (DRUPS) systems use a flywheel/motor-generator for very large data-centre and process loads.
• Modular UPS: hot-swappable 10-50 kVA power modules in a frame, giving N+1 redundancy and pay-as-you-grow capacity; now standard in Indian data centres.

UPS design elements and sizing

• Rating: quoted in kVA and kW. Older units had an output PF of 0.8 (10 kVA = 8 kW); modern units are unity-PF (10 kVA = 10 kW). Always size against the kW figure.
• Crest factor: non-linear loads draw peaky current; a UPS must supply a crest factor of about 3:1 without voltage distortion.
• Overload capability: typically 100-105% continuous, 110% for 10 minutes, 125% for 1 minute, 150% for about 30 seconds, then transfer to bypass.
• Battery: VRLA/SMF (most common, 3-5 year life), flooded tubular (long life, needs a ventilated room), and increasingly Li-ion with a BMS (lighter, longer life, higher upfront cost). Float voltage 2.25-2.27 V/cell, boost/equalise 2.35-2.40 V/cell, end-of-discharge 1.75 V/cell, temperature compensation about −3 mV/°C/cell. Life roughly halves for every 8-10 °C above 25 °C, so battery-room cooling is part of the design.
• Charger: sized to recharge to ~90% in 8-10 hours (about C/8 to C/10 current) while simultaneously feeding the load; this current adds to the UPS input rating.
• Autonomy and derating: battery Ah ratings are quoted at the 10 h or 20 h rate; at a 30-minute discharge only about half of that is available. Apply a capacity-rate factor, an ageing factor of 1.25 (end-of-life capacity 80%) and a temperature factor.
• Earthing and neutral: a UPS normally passes the supply neutral through; isolation transformers or 4-pole switching are used where a separately derived neutral or a different earthing arrangement is needed. Earthing per IS 3043, installation per IS 732/National Electrical Code (SP 30).
• Indian standards and rules: IS 16242 series, harmonised with IEC 62040 (Part 1 safety, Part 2 EMC, Part 3 performance/test methods); product safety for SMPS/adapters under IS 13252 (Part 1) moving to IS 62368-1 (the changeover is being phased in — verify the current BIS/MeitY notification); SMPS, adapters and UPS up to 10 kVA fall under the BIS Compulsory Registration Scheme (CRS) of the Electronics and IT Goods Order, so the product must bear an R-number. Harmonic limits follow IEC 61000-3-2 (adopted in the IS 14700 series) and, at installation level, IEEE 519 and the CEA (Technical Standards for Connectivity to the Grid) Regulations. Batteries: IS 1651 (flooded stationary), IS 15549 (VRLA stationary). Energy-efficiency labelling of inverters/UPS under BEE schemes has changed over time — check the current BEE list before quoting a star rating.

Key points

• Duty cycle D - the fraction of the switching period the main switch conducts; it sets the conversion ratio in every PWM topology.
• Buck/boost/buck-boost ratios - D, 1/(1−D), D/(1−D) respectively, in CCM and with ideal components.
• Flyback - stores energy in a gapped transformer; single switch, cheap, isolated, practical to about 150 W.
• Forward converter - transfers energy during the ON time, needs core reset and an output choke; D limited to ≈0.5.
• Bridge topologies - half-bridge and full-bridge give the best transformer use and dominate above 500 W.
• LLC resonant - soft switching (ZVS) at high frequency, low EMI, high efficiency; regulated by frequency, not duty.
• CCM vs DCM - CCM gives lower peak current and better use of devices; DCM gives smaller inductors and no reverse-recovery loss.
• Current-mode control - inner current loop gives cycle-by-cycle limiting and simpler compensation; needs slope compensation above D = 0.5.
• RHP zero - present in CCM boost/flyback; it caps achievable loop bandwidth.
• Active PFC - boost stage shaping input current, PF > 0.95, 390-400 V bus, required to meet harmonic limits.
• Hold-up time - the time the bulk capacitor sustains the output after mains loss, typically 10-20 ms.
• Bmax ≈ 0.2-0.3 T - practical ferrite flux limit; exceeding it saturates the core and destroys the switch.
• Skin depth - ≈0.21 mm in copper at 100 kHz; thicker conductors need litz or foil windings.
• UPS classes - VFD (offline), VI (line-interactive), VFI (online double conversion).
• Static bypass - SCR path that instantly transfers the load to raw mains on overload or inverter fault.
• kVA vs kW - kW = kVA × output power factor; modern UPS are unity PF, older ones 0.8.
• Battery derating - rated Ah applies at the 10/20 h rate; apply rate, ageing (1.25) and temperature factors for short autonomies.
• Float and end voltage - 2.25-2.27 V/cell float, 1.75 V/cell end-of-discharge for lead-acid.

Formulas and examples

Example 1 — Buck converter (24 V → 5 V, 3 A, 200 kHz, L = 33 µH, C = 100 µF, ESR = 30 mΩ)

• D = 5/24 = 0.208.
• ΔIL = (24 − 5) × 0.208/(33×10⁻⁶ × 200×10³) = 3.96/6.6 = 0.60 A (20% of Io — a good design target). Peak inductor current = 3 + 0.30 = 3.3 A.
• Capacitive ripple = 0.60/(8 × 200×10³ × 100×10⁻⁶) = 0.60/160 = 3.8 mV; ESR ripple = 0.60 × 0.03 = 18 mV → total ≈ 22 mV (ESR dominates — choose a low-ESR polymer or ceramic bank).
• Lcrit = (1 − 0.208) × (5/3)/(2 × 200×10³) = 1.32/400000 = 3.3 µH; 33 µH ≫ 3.3 µH, so CCM at full load.

Example 2 — 60 W flyback for 230 V mains (12 V, 5 A, 65 kHz, boundary mode)

• Design inputs: Vin,min = 240 V DC (after bulk-capacitor ripple at low line), Dmax = 0.45, diode drop Vf = 0.5 V, η = 0.85 → Pin = 60/0.85 = 70.6 W.
• Turns ratio n = Np/Ns = Vin,min·Dmax/[(Vo + Vf)(1 − Dmax)] = (240 × 0.45)/(12.5 × 0.55) = 108/6.875 = 15.7 → choose ≈ 15.
• Lp = (240 × 0.45)²/(2 × 70.6 × 65000) = 11,664/9.18×10⁶ = 1.27 mH.
• Ipk = 108/(1.27×10⁻³ × 65000) = 108/82.6 = 1.31 A; secondary peak = 15 × 1.31 ≈ 19.6 A (so the output capacitor must take a large RMS ripple current).
• Core ETD29, Ae = 76 mm², Bmax = 0.25 T → Np = (1.27×10⁻³ × 1.31)/(76×10⁻⁶ × 0.25) = 1.66×10⁻³/1.9×10⁻⁵ ≈ 87 turns; Ns = 87/15 ≈ 6 turns (then recheck D with the rounded ratio).
• Air gap lg ≈ (4π×10⁻⁷ × 87² × 76×10⁻⁶)/1.27×10⁻³ ≈ 0.57 mm.
• MOSFET stress = Vin,max + n(Vo + Vf) + leakage spike = (1.414 × 265) + 187 + spike ≈ 375 + 187 = 562 V plus spike → use an 800 V device. Output diode VR = 12 + 375/15 = 37 V → a 60-100 V Schottky.

Example 3 — Hold-up capacitor A 300 W supply must ride through 20 ms of mains loss. Bus falls from 325 V (peak of 230 V) to a usable minimum of 240 V; η = 0.90.

• C = 2 × 300 × 0.020/[0.90 × (325² − 240²)] = 12/[0.90 × (105,625 − 57,600)] = 12/43,222 = 2.78×10⁻⁴ F = 278 µF → use a standard 330 µF / 450 V electrolytic.

Example 4 — UPS battery bank (5 kVA, PF 0.8, 30 minutes autonomy)

1. Load = 5 × 0.8 = 4 kW; inverter efficiency 0.90 → DC power = 4000/0.90 = 4,444 W.
2. Bank: 16 blocks × 12 V = 192 V nominal; average discharge voltage ≈ 1.95 V/cell × 6 × 16 = 187 V; end-of-discharge = 16 × 10.5 = 168 V (inverter must hold up to this).
3. Current = 4,444/187 = 23.8 A; charge actually drawn = 23.8 × 0.5 h = 11.9 Ah.
4. Capacity-rate factor at the 30-minute rate ≈ 0.5 → 11.9/0.5 = 23.8 Ah; ageing factor 1.25 → ≈ 30 Ah required.
5. Select 16 × 12 V / 42 Ah VRLA (the next standard size above the requirement; a 26 Ah block falls short of the 30 Ah needed). Charger at C/10 ≈ 4.2 A × 192 V ≈ 0.8 kW, which must be added to the UPS input rating.

Example 5 — Loss budget of the Example 1 buck switch (Rds(on) 25 mΩ hot, tr + tf = 40 ns, Qg = 15 nC at 10 V)

• Pcond = (3 × √0.208)² × 0.025 = 1.37² × 0.025 = 47 mW.
• Psw = 0.5 × 24 × 3 × 40×10⁻⁹ × 200×10³ = 288 mW — six times the conduction loss, which is why raising fs has a cost.
• Pgate = 15×10⁻⁹ × 10 × 200×10³ = 30 mW. Switch total ≈ 0.37 W.
• A Schottky freewheel diode (Vf = 0.4 V) would dissipate (1 − 0.208) × 3 × 0.4 = 0.95 W; replacing it with a synchronous MOSFET recovers most of that and lifts efficiency from about 89% to 93%.

Where it is used

• Consumer and IT products: mobile chargers, laptop adapters, LED drivers, TV and set-top-box supplies, ATX PC supplies — a large BIS-CRS-registered manufacturing base around Noida, Pune, Chennai and Hyderabad.
• Data centres and IT infrastructure: modular online UPS of 20 kVA to several MVA from Schneider/APC, Vertiv, Eaton, Delta, Socomec and Numeric, with Li-ion or VRLA banks and N+1 redundancy.
• Telecom: −48 V DC power plants (rectifier modules, battery strings, controller) at BTS sites for Jio, Airtel and tower companies such as Indus Towers; SMPS rectifiers paralleled with droop/current sharing.
• Healthcare, banking and industry: online UPS for CT/MRI consoles, operation theatres, ATMs and core banking rooms, PLC/DCS panels and CNC machines.
• Home and SME back-up: inverter-UPS and solar hybrid inverters from Luminous, Microtek, Su-Kam, Exide and Amara Raja, with tubular or SMF batteries.
• Job roles: power-electronics design engineer (topology, magnetics, control loop, EMI/EMC), test and compliance engineer (BIS/CRS, IEC 62040, EMI chamber), application engineer sizing UPS and battery banks for projects, and service engineers maintaining UPS plant rooms.

Interview questions

• Q: Why is an SMPS more efficient than a linear supply? A: The switch is either fully on (low voltage drop) or fully off (no current), so the surplus voltage is not dissipated as heat; a linear regulator wastes (Vin − Vo)·Io continuously.
• Q: Why is the ferrite transformer in an SMPS so much smaller than a 50 Hz transformer? A: Induced voltage per turn is proportional to f·Ac·Bm, so raising the frequency from 50 Hz to 100 kHz lets the core area shrink by orders of magnitude for the same power.
• Q: How does a flyback transformer differ from a normal transformer? A: It is a gapped coupled inductor that stores energy in the gap during the ON time and releases it during the OFF time; primary and secondary never conduct together.
• Q: Why does a forward converter need a reset winding? A: Flux builds up in one direction during the ON time; without a reset path the core would walk into saturation within a few cycles.
• Q: What is the difference between an offline UPS and an online UPS? A: An offline UPS feeds the load from raw mains and switches to the inverter in a few milliseconds on failure; an online UPS always feeds the load from the inverter, giving zero transfer time and full voltage/frequency regulation.
• Q: Why does a UPS have a static bypass? A: It instantly transfers the load to raw mains on inverter fault or heavy overload (for example to clear a downstream fault), because the inverter cannot supply the fault current a breaker needs.
• Q: A 10 kVA UPS — how much real load can it take? A: kW = kVA × output power factor: 8 kW for an older 0.8 PF unit, 10 kW for a modern unity-PF unit.
• Q: Why is active PFC needed? A: A rectifier-capacitor front end draws narrow current pulses with PF around 0.5-0.6 and large harmonics; a boost PFC stage shapes the current sinusoidally to meet IEC 61000-3-2 limits and uses the cable rating efficiently.
• Q: Why does peak current-mode control need slope compensation? A: Above 50% duty cycle, perturbations in inductor current grow cycle by cycle and cause sub-harmonic oscillation; adding an artificial ramp restores stability.
• Q: What limits the bandwidth of a CCM boost or flyback loop? A: The right-half-plane zero — an increase in duty cycle momentarily reduces output current — so crossover must be set well below it.
• Q: A UPS battery is rated 42 Ah but gives far less on a 15-minute discharge. Why? A: The Ah rating is defined at the 10 or 20 hour rate; at high discharge rates available capacity falls sharply (Peukert effect), so a rate-correction factor must be applied when sizing.
• Q: Why do Y-capacitors in the EMI filter have a limited value? A: They inject current into the earth conductor, and safety standards cap the touch/leakage current (typically 0.25-3.5 mA depending on the equipment class).

Common mistakes

• Confusing kVA with kW when sizing a UPS, and ignoring the charger current in the input rating.
• Calculating output ripple from capacitance alone and ignoring the ESR term, which usually dominates in electrolytics.
• Using the nominal battery voltage instead of the average discharge voltage, and skipping the rate and ageing derating factors.
• Forgetting diode forward drops and efficiency when computing turns ratio and duty cycle — the design then cannot reach regulation at low line.
• Choosing a MOSFET rated only for Vin + reflected voltage, with no margin for the leakage-inductance spike, so it avalanches.
• Running a forward or push-pull converter beyond D = 0.5, or omitting slope compensation in peak current mode, and blaming the resulting saturation or oscillation on the control IC.
• Treating an offline home inverter as equivalent to an online UPS for sensitive loads, and paralleling new batteries with old ones in the same string.

Related topics

Power semiconductor devices · Rectifiers and converters · Inverters · Electric drives · Solar PV systems and MPPT · Electric vehicles basics